CMOS Power Amplifier Design Techniques for UWB Communication: A Review

This paper reviews CMOS power amplifier (PA) design techniques in favour of ultra-wideband (UWB) application. The PA circuit design is amongst the most difficult delegation in developing the UWB transmitter due to conditions that must be achieved, including high gain, good input and output matching, efficiency, linearity, low group delay and low power consumption. In order to meet these requirements, many researchers came up with different techniques. Among the techniques used are distributed amplifiers, resistive shunt feedback, RLC matching, shuntshunt feedback, inductive source degeneration, current reuse, shunt peaking, and stagger tuning. Therefore, problems and limitation of UWB CMOS PA and circuit topology are reviewed. A number of works on the UWB CMOS PA from the year 2004 to 2016 are reviewed in this paper. In recent developments, UWB CMOS PA are analysed, hence imparting a comparison of performance criteria based on several different topologies

A Review of CMOS Low Noise Amplifier for UWB System

A number of CMOS low noise amplifier (LNA) design for ultra-wideband (UWB) application had been produced with a various topology and techniques from year 2004 to 2016. The performance of LNA such as frequency bandwidth, noise figure, input and output matching and gain depend with the choice of the topology and technique used. Among the techniques introduced are current reuse, common source, resistive feedback, common gate, Chebyshev filter, distributed amplifier, folded cascade and negative feedback. This paper presents the collection of review about design of low noise amplifier used for UWB application in term of topology circuit. Thus, the problem and limitation of the CMOS LNA for UWB application are reviewed. Furthermore, recent developments of CMOS LNAs are examined and a comparison of the performance criteria of various topologies is presented

A Review of Highly Efficient Class F Power Amplifier Design Technique in Gigahertz Frequencies

Highly efficient class F power amplifier (PA) in Gigahertz (GHz) frequencies for wireless application is reviewed in this paper. The study focused on the technique used in designing a class F PA especially at GHz frequencies. Several works on the class F PA with different semiconductor technologies from year 2001 to 2016 are discussed. Recent works on class F PA in wireless applications are examined and a comparison of the PA performances of various techniques is presented. Key performance indicators for high efficiency class F PA include power added efficiency (PAE) and output power (Pout)

High Gain of 3.1-5.1 GHz CMOS Power Amplifier for Direct Sequence Ultra-Wideband Application

This paper presents the design a power amplifier (PA) for direct sequence ultra-wideband applications using 0.13 μm CMOS technology operating in a low band frequency of 3.1 GHz to 5.1 GHz. Current-reused technique is employed at the first stage to increase the gain at the upper end of the desired band. Cascaded common source configuration with shunt peaking inductor at the second stage helps to enhance the wideband frequency while increasing the gain approximately twice the performance. The simulation results specify that high gain of 20.3 dB with ± 0.8 dB flatness, group delay variation of ±121.3 ps, and good input return loss and output return loss is obtained over desired working band. The proposed PA achieves power consumption of 27.3 mW